System and method for executing binary images

ABSTRACT

A system that determines where a particular XIP component is stored on a medium and loads the component into RAM for execution, providing the ability to demand page specific components at will from storage media, frees up working RAM on memory constrained devices. A Binary File System uses a generic block driver component that loads the XIP code from a block based storage medium. Features of the file system include the ability to load pre-“fixed up” components from a block based device.. The invention thus allows an operating system to load code that was previously Executed In Place (XIP) from a block-oriented device.

CROSS REFERENCE TO RELATED APPLICATION

This application is a Continuation of U.S. patent application Ser. No.11/305,917, filed Dec. 19, 2005 (MSFT-4955), which is a Continuation ofU.S. patent application Ser. No. 10/277,580, filed Oct. 21, 2002(MSFT-1519). The invention relates generally to executing binary imagesand more particularly to systems and methods for executing binary imagesfrom non-linear storage systems.

TECHNICAL FIELD Background of the Invention

Execute in place (XIP) images are fixed position images and are built toexecute on a CPU or processor from a specific location in a computermemory device. The location must be accessible in a linear format sothat the CPU can fetch and execute individual instructions; thus, DRAMand NOR flash memory are commonly used memory storage devices that areused for XIP image execution. Block addressable devices such as diskstorage systems are generally not usable for execute in place imagesbecause memory in such devices must be read one block at a time and isnot addressable at the individual instruction level.

Contemporary computer systems combine various types of memory andstorage subsystems such flash memory, ROM, RAM, and disk storage. Readaccess times can vary greatly among various storage devices and ofteninfluences the combination of the various storage subsystems to maximizecost and performance. For example, the following list of devices haveread access times that are listed in order starting with the shortestread access time to the longest read access times): SDRAM, flash memory(NAND and NOR are not differentiated, it depends on read mode), and thendisk drives. For non-volatile memory types, erase and write times, orthe ability to update data, also varies greatly among device types. Forexample, the following device types are listed in order starting withthe shortest write times: NAND flash memory, NOR flash memory, and thendisk drives. SDRAM has the fastest erase and write times.

NAND flash memory typically does not support executing code in placefrom the flash memory part and thus typically requires a linearnon-volatile memory solution such as NOR flash memory or ROM forboot-time initialization. NAND vendors offers hybrid designs like NANDflash memory with a small NOR boot block or logic designs that enable aCPU to read from a particular good NAND block at reset time to addressthis issue.

NOR flash memory provides non-volatile storage. Typically there is noBIOS or boot loader present, this means that code execution will need tostart from the NOR flash memory at CPU reset, thus prohibitingcompression of the entire image to save space and perhaps allow for asmaller NOR part.

Non-writeable ROM, most likely production masked ROM, providesnon-volatile storage. The topology is very similar to NOR flash memorywith the same design trade offs. The main benefit of ROM designs overNOR flash memory is typically related to the cost advantage, dependingon volumes, of replacing the NOR flash memory with a ROM part. Adownside is effectively the lack of a real software upgrade path forfield devices other than physical replacement of the ROM part.

A single NAND flash memory device provides non-volatile storage. BecauseNAND is a block device and does not support a linear interface, the CPUcannot directly execute code stored in NAND flash memory. As a result,for this configuration to work, conventionally a non-volatile linearstorage area is required—many hybrid NAND flash memory parts contain asmall linear NOR region called a boot block.

NAND flash memory is a block-accessed storage device, very much like aconventional electro-mechanical disk drive with a serial interface. Forthis reason, NAND flash memory is generally not suitable for XIPsolutions because the CPU requires program memory to be linear. Instead,NAND flash memory images are typically moved to DRAM during executioneither at boot time or by OS paging. This ties the cost of NAND flashmemory-based devices more closely to the fluctuating DRAM market prices.

The typically shorter erase and write access times for NAND flash memoryover conventional linear flash memory is an advantage. Read access timesfor both NAND flash memory and conventional linear flash memory arecomparable. In addition, the erase cycle is typically an order ofmagnitude greater than linear flash memory, thereby extending thelifespan of the NAND flash memory part. This cost-per-byte benefit andthe larger storage sizes offset the added complexity involved in theNAND solution and any additional expense in DRAM.

The standard ATA or IDE hard disk drive can also be a good choice forimage storage. Like NAND flash memory, disk drives are non-linear,block-accessed devices. This means that a CPU cannot directly execute(XIP) code from disk. Instead, the XIP code must first be copied tolinear memory (DRAM), where the CPU can execute it. Read and writeaccess times are significantly longer than that of solid-state devices,but the storage capacity of disk drives is much larger.

SUMMARY OF INVENTION

As a result of today's memory-intensive applications, services and mediaobjects, devices have less and less working RAM available andcorrespondingly need more and more RAM to operate at the sameperformance level. In response, the invention provides a file systemthat determines where a particular operating system (OS) component isstored on a medium and loads the component into RAM for execution,providing the ability to demand page specific components at will fromstorage media, freeing up working RAM on memory constrained devices. Inone embodiment, the invention provides a Binary File System (BinFS), ageneric “block driver-agnostic” component that loads the OS from a blockbased permanent storage medium. Features of the BinFS component includethe ability to load pre-“fixed up” components from a block baseddevice.. The invention thus allows the OS to load code that waspreviously Executed In Place (XIP) from a block oriented device. The OSimage remains “fixed up” as it was previously, but can advantageously beobtained using the file system of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing summary, as well as the following detailed description ofpreferred embodiments, is better understood when read in conjunctionwith the appended drawings. For the purpose of illustrating theinvention, there is shown in the drawings exemplary constructions of theinvention; however, the invention is not limited to the specific methodsand instrumentalities disclosed. In the drawings:

FIG. 1 is a diagram depicting a computer system wherein aspects of theinvention may be incorporated;

FIG. 2 is a layout of an XIP program that may be used in conjunctionwith the invention;

FIG. 3 is an illustration of XIP files being stored in a non-linear,block-addressable storage device in accordance with the invention;

FIG. 4 is a block diagram of a system incorporating a binary file systemin accordance with aspects of the invention;

FIG. 5 is a diagram depicting an XIP header and other identifyinginformation for use with the invention; and

FIG. 6 is a flow chart of an operation incorporating aspects of theinvention.

DETAILED DESCRIPTION OF THE INVENTION

Overview

The following discussion is directed to executing fixed-up binary imagesfrom non-linear memory. The subject matter is described with specificityto meet statutory requirements. However, the description itself is notintended to limit the scope of this patent. Rather, the inventors havecontemplated that the claimed subject matter might also be embodied inother ways, to include different elements or combinations of elementssimilar to the ones described in this document, in conjunction withother present or future technologies.

Exemplary Computer System

FIG. 1 illustrates functional components of a computer 100, such as ahandheld computer, wherein aspects of the invention can be incorporated.The computer 100 represents many processing systems, such as desktopcomputers, notebook system, portable wireless communication handsets,palmtops, personal digit assistants (PDAs), pocket personal computers(PCs), portable gaming systems, multimedia systems, the combination ofany of the above example devices and/or systems, and other similarcomputer devices. Computer 100 includes a processor 102, RAM 104,Non-linear memory device 110, a power supply 110, display 112 andinput/output interfaces 114. RAM 104 is a volatile memory. Resident onthe RAM is file system RAM 106 and execution area RAM 108. Non-linearmemory device 110 exemplifies non-linear memory devices for computer100. Non-linear memory device 110 can be any memory device where the CPUcannot fetch individual addresses; rather the memory device must be readin blocks. In most instances the non-linear memory is implemented inNAND flash memory although any type of non-linear memory device can beused such as a disk drive system.

The computer 100 has a power supply 110 that is may implemented throughrechargeable batteries. The power supply 110 may further include anexternal power that overrides or recharges the built-in batteries, suchas an AC adapter or powered docking cradle. The display 112 can takemany forms such as a screen, touch screen, LEDs, etc. The input/outputinterfaces 114 can also take many forms depending on the computer 100such as a keyboard, IR port, serial port, and so forth. The computer 100can include more than one of any of the aforementioned elements. Otherelements such as touch pads, vibrating devices, wireless communicationcomponents and so forth are not shown, but could easily be a part of theexemplary computer 100.

Exemplary Binary Memory Images

FIG. 2 shows an exemplary implementation of a binary image 200 stored inmemory 110. The image 200 is logically partitioned into a plurality ofseparate independent regions 202-214. Each of the regions 202-214 can belogically viewed as a plurality of independent binary images that form aset of binary image 200 that may interact together such as applications,DLLs, drivers, etc. Although each region is shown as being contiguous,it is possible that the actual logical and/or physical address locationsfor each region may be at various arbitrary areas in a non-linear memory110 that are not necessarily contiguous. Each of the regions 202-214 canalso vary in size depending on the contents intended for a particularregion.

Each of the regions 202-214 are intended to store executable binaryprograms (hereinafter referred to as application programs), the contentsof which are represented by A-G. In one implementation, an applicationprogram is assigned to one specific region. Usually related applicationsand related miscellaneous items are usually placed in a single binaryregion to make updates easier. An application program is generallyrestricted to a specific region to reduce the size of files needed to bedownloaded when updating an application program.

The binary image 200 is generally created by an image fix-up tool thattakes relative addressed instructions that are created by a compiler, orsimilar tool that generates computer code that is executable by a CPU,and creates absolute addressed instructions that will reside and runfrom a particular memory location i.e. so that they can be fetched by aCPU for execution. The image fix up tool will create address links toother stand alone code such as DLL's etc. So that when the image fix-uptool is finished, the entire binary image 200 for performing aparticular set of operations is completed and ready for execution inplace (XIP).

Storage on Block Addressable Memory Device

FIG. 3 illustrates an aspect of the invention wherein one or more binaryimages 200 are stored on a non-linear memory device 110 (e.g., blockaddressable storage device such as a disk storage device). The one ormore binary images 200 for a part of an XIP memory image 304′ that formsa virtual memory 404 that can be executed by processor 102. Notably, thenon-linear storage device 110 can be partitioned and continue tofunction as a normal non-linear storage device. For example, asillustrated in FIG. 3, a disk storage device 110 is partitioned into aXIP space 304 and a FAT space 302.

The virtual memory space 304′ into which the XIP memory 304 maps mayalso comprise a conventional R/W area 306 that may contain variablesthat are read to and written by processor 102. That is, XIP area 304′ orvirtual memory is non-writable. Thus, there is a portion 306 of virtualmemory space that is readable and writeable and can contain an objectstore, code, a ram disk, etc. Interestingly, a ram disk itself may beused by the invention as the underlying non-linear memory device 110.

System Operation

FIG. 4 further illustrates aspects of the invention. As shown in FIG. 4,the underlying non-linear memory device 110 is addressed using aconventional block driver 416 that accesses the XIP partition 304 or theFAT partition 302 and retrieves blocks of memory, e.g., a disk sector.The XIP partition 304 contains one or more binary images, e.g., Bin 1200 a, Bin 2 200 b, Bin n 200 n. Optimally, XIP space 304 maps to theXIP area 304′ in virtual memory 404. The XIP space 304 is mapped intoXIP area 304′ by Binary File System 410. Binary File System 104retrieves blocks of memory representing portions of binary images 200a-200 n from non-linear memory 110 and loads them into physical memory104 as needed.

The aspects of the invention described may coexist with a conventionalsystem for loading binaries wherein the binaries are bound at load time.In such a system, file system driver 414 access files from the FATpartition of memory device 110. Loader 412 then fixes up the absolutememory addresses as necessary. That is loader 412 consolidates exefiles, DLL files, and so on and generates a binary image in theconventional manner which can then be loaded into virtual memory 404.

Computer systems such as hand held computers generally create executablecomponents in one of two different forms at build time: positionindependent, also called relocatable, forms; or fixed position, alsocalled execute in place as described above (XIP), forms. At run timeloader 412 fixes relocatable code to run at an available virtual memoryRAM address dynamically chosen by the loader. The benefit is anefficient use of system RAM without requiring the system to explicitlyspecify the RAM layout. The downside is slightly longer load times asthe OS loader handles the relocation. In addition, there is lessflexibility in determining where the code executes from because code canonly be relocated to RAM.

Typically, the virtual memory is written to a portion of the non-linearmemory such as a disk drive file in pages. For example, virtual memorymay be stored in the FAT portion 302 of non-linear storage device 110.The pages are then loaded on demand from the virtual memory 404 intophysical memory 104. In this way, a relatively small physical addressspace can be made to appear significantly larger by swapping pagesbetween virtual memory and physical memory. According to an aspect ofthe present invention, when physical memory contains a binary filestored in the XIP space 304, the page does not have to be swapped tovirtual memory stored in the FAT portion 302 of non-linear memory device110. Rather, the physical memory containing the portion of binary 200a-200 n can merely be over-written without swapping out the contents ofphysical memory. This is so because that binary 200 a-200 n can simplybe retrieved from the XIP space 304 as needed.

FIG. 5 shows a binary file 500 that is stored on a medium andillustrates an embodiment of a binary file having characteristicshelpful in loading binary file 500 from a block storage device. In oneimplementation, the binary file 500 includes an XIP entry header 502,registry information 504; and a digital signature 506.

The XIP entry header 502 contains information about the size of thebinary code contained within section 504 and the start address for theregion. In other implementations it is possible to include otherinformation in the XIP entry header, such as the version of thesoftware, a public key and so forth.

The digital signature 506 of the XIP file provides unique securityinformation about the file 500. This digital signature is checkedagainst a security key. This guarantees that the software is legitimateprior to the software being installed in physical memory 104. Havingprivate keys ensures that only certain owners of a particular region canbuild and update contents of a binary 200. Security also ensures thatthe binary file does not become replaced with corrupted unauthorizedfiles, which could cause catastrophic failure for the computer 100.

FIG. 6 is a flow chart illustrating a process 600 for creating andloading XIP binary files in accordance with an aspect of the invention.Initially at block 601, XIP binary files are created. For example, theROM Image Builder tool, Romimage.exe, is a build tool for WINDOWS CEthat runs in the final phase of the build process. Romimage.exe performsthe following functions:

-   -   Collects all the requisite components that make up the final        image including drivers, executables, and data files.    -   Performs fix-ups on any executable code in a space efficient        manner, thus detailing where code will execute from by default.

Other binary file image building tools could also be used. After the XIPbinary files are created they can be loaded onto the XIP partition 304.

Thereafter, the system can start up. Typically, the boot loader is thefirst bit of code to run on a device after hardware reset or startupwith the possible exception of BIOS/POST code. The boot loader isresponsible for locating, loading, and executing the OS image. Theloader typically resides in CPU-accessible linear memory, although thereare instances where the loader resides on a block-accessed device suchas a disk drive or NAND flash memory, for example, the BIOS boot loaderwhich relies on the PC BIOS bootstrap process to load it into RAM andexecute it.

When searching for a valid OS image to load, the boot loader willtypically look in local storage first. Verifying that an image is validcan involve checking the signature of the stored image—such as hashingthe important contents of the image and then generating a digitalcertificate, which is compared against the image—or can be based on asimpler validation like a checksum.

The binary file system in accordance with the present invention is alsoloaded into memory. At block 604, the binary file system then scans theXIP partition 304 for XIP binary files. The files are scanned byscanning the binary file header and other information as described inconnection with FIG. 5. After all of the binary files are found, thevirtual memory space is reserved by requesting memory locations andspaces required to run each XIP binary file.

At block 608 various applications needed to run the system are loadedinto memory such as drivers and so on. The scanned binary files are thentracked and paged into virtual memory as needed as indicated by block620. Physical memory is managed using the rest of the virtual memory asin a typical virtual memory system.

The various techniques described herein may be implemented with hardwareor software or, where appropriate, with a combination of both. Thus, themethods and apparatus of the present invention, or certain aspects orportions thereof, may take the form of program code (i.e., instructions)embodied in tangible media, such as floppy diskettes, CD-ROMs, harddrives, or any other machine-readable storage medium, wherein, when theprogram code is loaded into and executed by a machine, such as acomputer, the machine becomes an apparatus for practicing the invention.In the case of program code execution on programmable computers, thecomputer will generally include a processor, a storage medium readableby the processor (including volatile and non-volatile memory and/orstorage elements), at least one input device, and at least one outputdevice. One or more programs are preferably implemented in a high levelprocedural or object oriented programming language to communicate with acomputer system. However, the program(s) can be implemented in assemblyor machine language, if desired. In any case, the language may be acompiled or interpreted language, and combined with hardwareimplementations.

The methods and apparatus of the present invention may also be embodiedin the form of program code that is transmitted over some transmissionmedium, such as over electrical wiring or cabling, through fiber optics,or via any other form of transmission, wherein, when the program code isreceived and loaded into and executed by a machine, such as an EPROM, agate array, a programmable logic device (PLD), a client computer, avideo recorder or the like, the machine becomes an apparatus forpracticing the invention. When implemented on a general-purposeprocessor, the program code combines with the processor to provide aunique apparatus that operates to perform the indexing functionality ofthe present invention.

While the present invention has been described in connection with thepreferred embodiments of the various figures, it is to be understoodthat other similar embodiments may be used or modifications andadditions may be made to the described embodiment for performing thesame function of the present invention without deviating there from. Forexample, while exemplary embodiments of the invention are described inthe context of digital devices such as personal computers and PDAs, oneskilled in the art will recognize that the present invention is notlimited to such digital devices, as described in the present applicationmay apply to any number of existing or emerging computing devices orenvironments, such as a gaming console, handheld computer, portablecomputer, etc. whether wired or wireless, and may be applied to anynumber of such computing devices connected via a communications network,and interacting across the network. Furthermore, it should be emphasizedthat a variety of computer platforms, including handheld deviceoperating systems and other application specific operating systems arecontemplated, especially as the number of wireless networked devicescontinues to proliferate. Therefore, the present invention should not belimited to any single embodiment, but rather construed in breadth andscope in accordance with the appended claims.

1. A computer system, comprising: a non-linearly addressable memorydevice comprising fixed-up, execute in place computer-executableinstructions; a physical memory device; and a file system for copyingthe computer-executable instructions into the physical memory whereinthe file system is capable of overwriting the computer-executableinstructions in the physical memory without needing to swap them outbetween the physical memory and the non-linearly addressable memory andis capable of retrieving any computer-executable instructions from thenon-linearly addressable memory as needed, wherein thecomputer-executable instructions are binary images, wherein the binaryimages comprise code based instructions.
 2. The computer systemaccording to claim 1, wherein at least one of the binary images islogically partitioned into a plurality of separate independent regions,wherein the regions can be logically viewed as a plurality ofindependent binary images that may interact together.
 3. The computersystem according to claim 2, wherein the actual logical and physicaladdress location of each region is at various arbitrary areas in thenon-linearly addressable memory.
 4. The computer system according toclaim 2, wherein the regions vary in size depending on the contentsintended for a particular region.
 5. The computer system according toclaim 1, wherein the computer-executable instructions are fixed-up by animage fix-up tool, which takes relative addressed instructions createdby a compiler or a similar tool and creates absolute addressedinstructions.
 6. The computer system according to claim 1, wherein thephysical memory includes DRAM, NOR flash memory, and RAM.
 7. Thecomputer system according to claim 6, wherein the DRAM and NOR flashprovide non-volatile storage and RAM provides volatile storage.
 8. Thecomputer system according to claim 1, wherein a RAM disk is used inplace of the non-linearly addressable memory.
 9. The computer systemaccording to claim 1, wherein the non-linearly addressable memoryincludes NAND flash memory and a disk storage system, including astandard ATA and IDE hard disk drive.
 10. A method for managing memory,comprising: storing on a non-linearly addressable memory device, asoftware component comprising a set of computer-executable instructions,wherein the computer-executable instructions are fixed to be executedfrom a predefined memory location; and loading the set ofcomputer-executable instructions into a linearly addressable memorydevice using a file system when at least one of the computer-executableinstructions is fetched by a processor.
 11. The method according toclaim 10, wherein storing includes creating the instructions, includingcreating absolute addressed instructions based on relative addressedinstructions.
 12. The method according to claim 11, wherein creating theabsolute addressed instructions from relative addressed instructions isperformed by an image fix-up tool.
 13. The method according to claim 12,wherein the image fix-up tool creates address links among theinstructions.